Ma Ning
Ph.D.，Principal Investigator
Email: maning@@gdiist.cn
Personal Profile
Ma Ning, Ph.D, principal investigator of the lab of brain-inspired ASICs and integration. From 2002 to 2006, he studied in the Department of Information Science and Electronic Engineering, Zhejiang University, and received the bachelor's degree. From 2007 to 2021, he worked in the Swedish VINN Excellence iPack Center, Imsys in Sweden, and Ericsson in Sweden. During the period from 2010 to 2015, he pursed a doctoral degree in Royal Institute of Technology（KTH） in Sweden, and received the Ph.D degree in electronic and computer systems in 2015. He has been engaged in the research of high-efficiency processors and networked multimedia processing. In the fields of low-power domain-specific processors and on-chip network chips, high-performance multi-core/many-core processors and the design of neuromorphic computing processors, he has rich scientific research and industrial practical experience. The main research achievements include the design of domain-specific processor architecture and its chip implementation, breaking through the design idea of reducing data relocation energy consumption with control-centric design methodology, thereby greatly improving computing energy efficiency, and related chips have achieved mass production; for large broadband network media Real-time processing applications, proposed multi-core processor architecture with task mapping algorithm to maximum performance, as well as the router design and optimization in the large-scale on-chip networks. Related achievements are applied to multimedia terminals and communication networks; in the area of brain-inspired processor and system, the research was focused on power management and optimization of ultra-large-scale circuits, ultra-high-density integration technology, multi-clock domain and cross-clock domain design and optimization, etc. The related achievements are applied to the large-scale neuron network chip system.
Lab of Brain-inspired ASICs and integration:
Brain-inspired computing refers to the information processing method of the biological brain, takes neurons and synapses as the basic units, simulates the biological nervous system in terms of structure and function, and then builds a new computing form of "artificial brain". Our lab is founded mainly for the chip implementation of brain-inspired computing.
1. Based on integrated circuit technology and guided by the theory of brain-inspired artificial intelligence, by simulating the characteristics of brain modular plasticity, a multi-level coarse/fine-grained reconfigurable architecture is designed, so that the chip can process data asynchronously, in parallel, and in a distributed manner, and realize the models of different neurons. Finally, the simulation and application of hundreds of billions of neurons will be realized through the on-chip network and hierarchical scalable design.
2. Research on brain-inspired chips and intelligent systems for specific scenarios. Adapt to the requirements of the intelligent society for different computing forms such as embedded computing, swarm computing, and cloud computing, and the requirements for different levels of intelligence such as motion control, pattern recognition, and decision-making. For different processing scenarios, develop brain-inspired ASICs and intelligent systems with their own characteristics.
3. Research on brain-inspired smart chips based on future computing technology. While developing semiconductor brain-inspired ASICs, pay close attention to the development of future computing technologies such as new electronic devices, superconducting computing, molecular computing, optical computing, bionic computing, and quantum computing. Under the guidance of brain-inspired intelligence theory, develop brain-inspired intelligent ASICs based on those future computing technology.
Representative publications
1. Ning Ma, Zhibo Pang, Jun Chen, Hannu Tenhunen and Li-Rong Zheng. “A 5Mgate/414mW networked media SoC in 0.13um CMOS with 720p multistandard video decoding,” In Proceedings of IEEE Asian Solid-State Circuits Conference A-SSCC, pp.385,388, 16-18 Nov. 2009
2. Ning Ma, Zhuo Zou, Zhonghai Lu, and Li-Rong Zheng. “Design and Implementation of Multi-mode Routers for Large-scale Inter-core networks,” Integration, the VLSI Journal (Elsevier), 2015
3. Ning Ma, Zhonghai Lu, and Li-Rong Zheng. “System design of full HD MVC decoding on mesh-based multicore NoCs,” In Microprocessors and Microsys-tems (Elsevier), Volume 35, Issue 2, March 2011, Pages 217-229
4. Ning Ma, Zhuo Zou, Yuxiang Huan, Stefan Blixt, Zhonghai Lu and Li-Rong Zheng. “A 101.4 GOPS/W Reconfigurable and Scalable Control-centric Embedded Processor for Domain-specific Applications,” IEEE International Symposium on Circuits and Systems (ISCAS), 2016
5. Ning Ma, Zhuo Zou, Zhonghai Lu, Stefan Blixt and Li-Rong Zheng. “A hierarchical reconfigurable micro-coded multi-core processor for IoT applications,” In Proceedings of IEEE International Symposium on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), pp.1,4, 26-28 May 2014
6. Ning Ma, Zhibo Pang, Hannu Tenhunen and Li-Rong Zheng. “An ASIC design-based configurable SOC architecture for networked media,” In Proceedings of IEEE International Symposium on System-on-Chip, pp.1,4, Nov.2008.
7. Ning Ma, Zhonghai Lu, Zhibo Pang, and Li-Rong Zheng. “System-level exploration of mesh-based NoC architectures for multimedia applications,” In Proceedings of IEEE International SOC Conference (SOCC), pp.99,104, 27-29 Sept. 2010
8. Ning Ma, Zhuo Zou, Zhonghai Lu, and Li-Rong Zheng. “Implementing MVC Decoding on Homogeneous NoCs: Circuit Switching orWormhole Switching,” In Proceedings of 23rd Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP), pp.387,391, 4-6 March 2015
